With the constant development of semiconductor technique, the integration level of integrated circuits is becoming higher, and the device size is reduced continuously. However, the performance of the device is also greatly influenced due to the continuous reduction of the device size.
An important factor for keeping appropriate performance in a field effect transistor is the carrier mobility, which influences the current or the amount of electric charges capable of flowing in the channel of a semiconductor device. After the technique of complementary metal oxide semiconductor transistors (CMOST) of 90 nm node has been developed, the stress technique may be applied to increase the carrier mobility, so as to increase the driving current of the device. For example, with respect to a metal oxide semiconductor field effect transistor (MOSFET), it is possible to increase the carrier mobility by applying stresses onto the channel between the source/drain regions, so as to improve the performance of an integrated circuit. Particularly, for an nMOSFET, the carriers in the channel are electrons, and the tensile stresses at both sides of the channel may increase the electron mobility; while for a pMOSFET, the carriers in the channel are holes, and the compressive stresses at both sides of the channel may increase the hole mobility.
With the further improvement of the integration level of integrated circuits, the requirements for stress applications during the manufacturing of semiconductor devices are also increased in the industry.